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MC74LVX541 Octal Bus Buffer
The MC74LVX541 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74LVX541 is a noninverting type. When either OE1 or OE2 are high, the terminal outputs are in the high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.
Features
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20 SOIC-20 DW SUFFIX CASE 751D 1 LVX541 AWLYYWW
* * * * * * * * * * * *
High Speed: tPD = 5.0 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 4 mA (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 3.6 V Operating Range Low Noise: VOLP = 1.2 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA Chip Complexity: 134 FETs or 33.5 Equivalent Gates ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Pb-Free Packages are Available*
20 1
20 TSSOP-20 DT SUFFIX CASE 948E 1 LVX 541 ALYW
20 1
20 SOEIAJ-20 M SUFFIX CASE 967 1 74LVX541 AWLYWW
20 1
A L, WL Y, YY W, WW
= = = =
Assembly Location Wafer Lot Year Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
March, 2005 - Rev. 2
Publication Order Number: MC74LVX541/D
MC74LVX541
A1 A2 A3 DATA INPUTS A4 A5 A6 A7 A8 OUTPUT ENABLES OE1 OE2
2 3 4 5 6 7 8 9 1 19
18 17 16 15 14 13 12 11
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 NONINVERTING OUTPUTS
Figure 1. LOGIC DIAGRAM
1 19 &
OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
QE1 QE2 A1 A2 A3 A4 A5 A6 A7 A8
EN
2 3 4 5 6 7 8 9
1
18 17 16 15 14 13 12 11
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
Figure 2. PIN ASSIGNMENT
Figure 3. IEC LOGIC DIAGRAM
FUNCTION TABLE
Inputs Output Y OE1 L L H X OE2 L L X H A L H X X L H Z Z
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MC74LVX541
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MAXIMUM RATINGS
SymbolIIIIIIIIIIIII Parameter VCC Vin DC Supply Voltage DC Input Voltage Value Unit V V V - 0.5 to + 7.0 - 0.5 to + 7.0 Vout IIK DC Output Voltage - 0.5 to VCC + 0.5 - 20 20 25 50 500 450 Input Diode Current mA mA mA mA IOK Iout Output Diode Current DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Storage Temperature SOIC Packages TSSOP Package mW C Tstg - 65 to + 150 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. Derating -- SOIC Packages: - 7 mW/C from 65 to 125C TSSOP Package: - 6.1 mW/C from 65 to 125C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin Parameter Min 2.0 0 0 Max 3.6 5.5 Unit V V V
DC Supply Voltage DC Input Voltage
Vout TA
DC Output Voltage
VCC
Operating Temperature, All Package Types Input Rise and Fall Time
-40 0
+ 85 100
C
tr, tf
VCC = 3.3V 0.3V
ns/V
DC ELECTRICAL CHARACTERISTICS
Symbol VIH
Parameter
Test Conditions
VCC V 2.0 3.0 3.6 2.0 3.0 3.6
TA = 25C Typ
TA = - 40 to 85C Min Max
Min
Max
Unit V
Minimum High-Level Input Voltage
1.50 2.0 2.4
1.50 2.0 2.4
VIL
Maximum Low-Level Input Voltage
0.50 0.80 0.80
0.50 0.80 0.80
V
VOH
Minimum High-Level Output Voltage Viin = VIH or VIL
IOH = - 50 mA IOH = - 50 mA IOH = - 4 mA IOL = 50 mA IOL = 50 mA IOL = 4 mA
2.0 3.0 30 3.0 2.0 3.0 30 3.0
1.9 2.9 29 2.58
2.0 3.0 30 0.0 0.0 00
1.9 2.9 29 2.48
V
VOL
Maximum Low-Level Output Voltage Viin = VIH or VIL Maximum Input Leakage Current Maximum Three-State Leakage Current
0.1 0.1 01 0.36 0.1 0.2 5 4.0
0.1 0.1 01 0.44 1.0 2.5
V
Iin
Vin = 5.5 V or GND Vin = VIL or VIH Vout = VCC or GND Vin = VCC or GND
0 to 3.6 3.6 3.6
mA mA mA
IOZ
ICC
Maximum Quiescent Supply Current
40.0
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MC74LVX541
III I I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I II I I I I II I I I I II I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I II I I I I II I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I III I I II I I I I II I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I II I I II I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII I IIII I I I I II I I I I IIIIIIIIIIIIIIIIIIIIII I I I II I I I I II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I II I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol tPLH, tPHL Parameter TA = 25C Typ 5.0 7.5 3.5 5.0 6.8 9.3 4.7 6.2 TA = - 40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max Test Conditions Min Max Unit ns Maximum Propagation Delay, A to Y VCC = 2.7 V CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF 7.0 10.5 5.0 7.0 8.5 12.0 6.0 8.0 VCC = 3.3 0.3 V VCC = 2.7 V RL = 1 kW tPZL, tPZH Output Enable TIme, OE to Y CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 50 pF 10.5 14.0 7.2 9.2 12.5 16.0 ns VCC = 3.3 0.3 V RL = 1 kW VCC = 2.7 V RL = 1 kW 8.5 10.5 tPLZ, tPHZ Output Disable Time, OE to Y 11.2 6.0 15.4 8.8 1.5 1.0 10 17.5 10.0 1.5 1.0 10 ns VCC = 3.3 0.3 V RL = 1 kW VCC = 2.7 V (Note 1) CL = 50 pF CL = 50 pF CL = 50 pF tOSLH, tOSHL Output to Output Skew ns ns VCC = 3.3 0.3 V (Note 1) Cin Maximum Input Capacitance 4.0 6.0 pF pF Cout Maximum Three-State Output Capacitance (Output in High Impedance State) Typical @ 25C, VCC = 5.0V 18 CPD Power Dissipation Capacitance (Note 2) pF 1. Parameter guaranteed by design. tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|. 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per bit). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V)
TA = 25C Symbol VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Parameter Typ 0.5 -0.5 Max 0.8 -0.8 2.0 0.8 Unit V V V V
SWITCHING WAVEFORMS
VCC VCC A tPLH 50% VCC Y 50% tPHL OE1 or OE2 50% tPZL Y 50% VCC tPZH 50% VCC tPHZ VOH -0.3 V HIGH IMPEDANCE tPLZ 50% GND HIGH IMPEDANCE VOL +0.3 V
GND
Y
Figure 4. http://onsemi.com
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Figure 5.
MC74LVX541
TEST CIRCUITS
TEST POINT OUTPUT DEVICE UNDER TEST CL* DEVICE UNDER TEST OUTPUT TEST POINT 1 kW CL* CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 6.
Figure 7.
INPUT
Figure 8. INPUT EQUIVALENT CIRCUIT
ORDERING INFORMATION
Device MC74LVX541DW MC74LVX541DWG MC74LVX541DTR2 MC74LVX541M MC74LVX541MG MC74LVX541MEL MC74LVX541MELG Package SOIC-20 SOIC-20 (Pb-Free) TSSOP-20* SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) Shipping 38 Units / Rail 38 Units / Rail 2500 Tape & Reel 40 Units / Rail 40 Units / Rail 2000 Tape & Reel 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74LVX541
PACKAGE DIMENSIONS
SOIC-20 DW SUFFIX CASE 751D-05 ISSUE G
D
A
11 X 45 _
q
H
M
B
M
20
10X
0.25
E
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
TSSOP-20 DT SUFFIX CASE 948E-02 ISSUE B
20X
K REF
M
L
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
2X
L/2
L
PIN 1 IDENT 1 10
B -U-
J J1
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
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IIII IIII IIII
SECTION N-N M DETAIL E
20
11
K K1
0.25 (0.010)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
DIM A B C D F G H J J1 K K1 L M
MC74LVX541
PACKAGE DIMENSIONS
SOEIAJ-20 M SUFFIX CASE 967-01 ISSUE O
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.81 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.032
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MC74LVX541
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